MT-4K monitor is an advanced diagnostic instrument helpful in developing and servicing systems equipped with the control bus according to I²C Philips standard. The monitor displays the logical status of SDA and SCL lines and records and displays all of the important details of the transmission.

The monitor is connected to a tested system via 3 wires: SDA, SCL and GND. It does not influence the behaviour of the tested system. One should make sure that the wires are kept far from strong magnetic fields (deflection yokes, high voltage area etc.).

The correct test results require also the following conditions:

• SDA/SCL low level should be below 1.2V, and high level should be over 3.0V.
• SCL frequency must not exceed 100 kHz, and low or high pulses must not be shorter than 4 µs. (These conditions follow the I²C specification.
• For best LCD contrast the normal ambient temperature is recommended.

Indications of the instrument
The display shows information in two rows. Recorded bytes are displayed in binary form (MSBit first - reflecting the transmission order). In the upper row the address byte is displayed. Lower row displays data bytes that follow the given address. Next to each byte the „+" or „-" mark designes a valid (+) or missing (-) acknowledge. The presence of acknowledge is the most important indication for service purposes.

In certain modes both rows can contain information other than above.

Operation modes
One of three operation modes can be selected by a button press. See figure below.

MT-4K front panel

Bus status displaying mode (initial mode)
This operation mode is set automatically after power-on or can be activated by pressing SDA/SCL button. Status of both bus lines SDA and SCL is shown in the form imitating scope display.

It makes sense to enter other modes only if both lines can be made "alive". If any of two lines is permanently low the faulty device should be determined by disconnecting one by one all components connected to the bus in the tested system. If lines are permanently high (and can not be waken-up by activating different functions of the tested system) attention should be payed to the control unit (microcontroller). It may be faulty, permanently reset, out of supply, clock or other important signal.

Address recording mode
This operation mode is activated by pressing ADDRESS button. All addresses appearing on the bus are recorded. The recording can last as long as required and terminated by pressing the same button. Next (third) button press switches the instrument into displaying of the recorded addresses. The cursor buttons can browse through addresses, displaying them together with acknowledge („+", „-" or „±"). Each address will be displayed only once no matter how many times it appeared on the bus. The last (LSB) address bit will be additionally explained as „READ" or „WRITE" depending on the direction of succeeding data flow. In the lower LCD row the most probable function of the addressed device is displayed. However it is strongly recommended to refer to the attached list of integrated circuits to identify the device accurately.

The best way to use this mode in service is to start recording before turning on the power to the tested system. After reset the controller usually comunicates with each circuit connected to the bus. The observation of acknowledges just after power on will disclose all faulty or missing ICs.

If the "±" symbol appears next to a certain address, it means that the referring IC generates acknowledge but not on every call. This can be a normal behaviour for some devices which may be not always ready for receiving the transmission (e.g. eeproms short while after being loaded with data).

Address + data recording mode
This operation mode is activated by pressing ADDR+DATA button. The instrument can store up to 4kBytes of transmission. If the bus is busy all the time, it may take only a few seconds to fill up the whole memory. For this reason the user can choose between recording all infromation or focusing the recording for some devices only. Thus after first pressing the ADDR+DATA button the address pattern is displayed. Using cursor buttons and „XCH" button, each address bit can be defined as "0", "1" or "*" (don’t care). Defining the address patern enables address recording and data bytes directed only to selected device/devices.

On a second ADDR+DATA button press the recording is initiated. It can be stopped by pressing this key again or terminated automatically on memory overload.

Recorded bytes can be browsed by means of cursor buttons. When letter "A" (address) is highlighted, the browsing goes by addresses (displayed in the upper row). When letter "D" (data) is highlighted, the browsing goes through data bytes wich followed given address. Switching between "A" and "D" is performed with the "XCH" button.

Address list
Each I²C slave circuit has its own address. The address of each device connected to a common bus must be unique. Addresses are most often given by the IC manufacturers. Only in some cases addresses can be programmed. Often one or two address bits can be defined by application engineer by means of appropriate connection of the device pins. This feature allows to connect more than one IC of the same type to a common bus.

The attached documents contain lists of ICs with their addresses. The bits which are not factory fixed are marked by "A".

The list does not include hundreds of eeprom types. They all have a common address pattern: 1010AAA0.